An AC surface discharge type panel that is typical as a plasma display panel (hereinafter abbreviated as “a panel”) includes a number of discharge cells between a front plate and a back plate arranged to be opposite to each other.
The front plate is constituted by a front glass substrate, a plurality of display electrodes, a dielectric layer and a protective layer. Each display electrode is composed of a pair of scan electrode and sustain electrode. The plurality of display electrodes are formed in parallel with one another on the front glass substrate, and the dielectric layer and the protective layer are formed so as to cover the display electrodes.
The back plate is constituted by a back glass substrate, a plurality of data electrodes, a dielectric layer, a plurality of barrier ribs and phosphor layers. The plurality of data electrodes are formed in parallel with one another on the back glass substrate, and the dielectric layer is formed so as to cover the data electrodes. The plurality of barrier ribs are formed in parallel with the data electrodes, respectively, on the dielectric layer, and the phosphor layers of R (red), G (green) and B (blue) are formed on a surface of the dielectric layer and side surfaces of the barrier ribs.
The front plate and the back plate are arranged to be opposite to each other such that the display electrodes intersect with the data electrodes in three dimensions, and then sealed. An inside discharge space is filled with a discharge gas. The discharge cells are formed at respective portions at which the display electrodes and the data electrodes are opposite to one another.
In the panel having such a configuration, a gas discharge generates ultraviolet rays, which cause phosphors of R, G and B to be excited and to emit light in each of the discharge cells. Accordingly, color display is performed.
A sub-field method is employed as a driving method of the panel. In the sub-field method, one field period is divided into a plurality of sub-fields, and the discharge cells are caused to emit light or not in the respective sub-fields, so that a gray scale display is performed. Each sub-field has a setup period, a write period and a sustain period.
In the setup period, a setup discharge is performed, and wall charges required for a subsequent write operation is formed in each discharge cell. In addition, the setup period has a function of generating priming for reducing a discharge time lag to stably generate a write discharge. Here, the priming means an excited particle that serves as an initiating agent for the discharge.
In the write period, progressive-scan pulses are applied to the scan electrodes while write pulses corresponding to image signals to be displayed are applied to the data electrodes. This selectively generates the write discharges between the scan electrodes and the data electrodes, causing the wall charges to be selectively formed.
In the subsequent sustain period, sustain pulses are applied between the scan electrodes and the sustain electrodes a predetermined number of times corresponding to luminances to be displayed. Accordingly, discharges are selectively induced in the discharge cells in which the wall charges have been formed by the write discharges, causing the discharge cells to emit light. Hereinafter, a ratio of a display luminance of each sub-field to a reference display luminance is referred to as “a luminance weight”.
The plurality of scan electrodes are driven by a scan electrode drive circuit, the plurality of sustain electrodes are driven by a sustain electrode drive circuit, and the plurality of data electrodes are driven by a data electrode drive circuit.
The scan electrode drive circuit includes a plurality of scan ICs (Integrated Circuits) connected to the plurality of scan electrodes, respectively. Moreover, the scan electrode drive circuit has a first node to which a low potential is applied and a second node to which a high potential is applied. Each scan IC includes a first switch connected between the scan electrode and the first node and a second switch connected between the scan electrode and the second node. A capacitor that holds a constant voltage is connected between the first node and the second node. This causes a potential of the second node to be higher than a potential of the first node by the constant voltage.
The potential of the first node is controlled by a voltage application circuit, and either the first switch or the second switch of each scan IC is selectively turned on. Accordingly, driving voltages having predetermined waveforms are applied to the respective scan electrodes in the setup period, the write period and the sustain period (see Patent Documents 1 and 2, for example).    [Patent Document 1] JP 2004-287003 A    [Patent Document 2] JP 2005-266776 A    [Patent Document 3] JP 2004-317609 A